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| Product Specification Highly-Integrated Green-Mode PWM Controller SG6741 linearly decrease the switching frequency at light-load conditions. To avoid acoustic-noise problems, the minimum PWM frequency is set above 22KHz. This green-mode function enables the power supply to meet international power conservation requirements. With the internal high-voltage start-up circuitry, the power loss due to bleeding resistors is also eliminated. To further reduce power consumption, SG6741 is manufactured using the BiCMOS process, which allows operating current as low as 4mA. SG6741 integrates a frequency-hopping function that helps reduce EMI emission of a power supply with minimum line filters. Its built-in synchronized slope compensation achieves stable peak-current-mode control. The proprietary internal line compensation ensures constant output power limit over a wide range of AC input voltages, from 90VAC to 264VAC. SG6741 provides many protection functions. In addition to cycle-by-cycle current limiting, the internal open-loop protection circuit ensures safety when an open-loop or output short-circuit failure occurs. PWM output is disabled until VDD drops below the UVLO lower limit; then the controller starts again. As long as VDD exceeds about 26V, the internal OVP circuit is triggered. SG6741 is available in an 8-pin DIP or SOP package. FEATURES High-voltage start-up Low operating current (4mA) Linearly decreasing PWM frequency to 22kHz Frequency hopping to reduce EMI emission Peak-current-mode control Cycle-by-cycle current limiting Leading-edge blanking Synchronized slope compensation Gate output maximum voltage clamp (18V) VDD over-voltage protection (auto restart) VDD under-voltage lockout (UVLO) Internal open-loop protection Constant power limit (full AC input range) APPLICATIONS General-purpose switch-mode power flyback power converters, including: Power adapters Open-frame SMPS supplies and DESCRIPTION The highly integrated SG6741 series of PWM controllers provides several features to enhance the performance of flyback converters. To minimize standby power consumption, a proprietary green-mode function provides off-time modulation to TYPICAL APPLICATION (c) System General Corp. Version 1.2.1 (IAO33.0047.B2) -1- www.sg.com.tw * www.fairchildsemi.com September 19, 2007 Product Specification Highly-Integrated Green-Mode PWM Controller SG6741 PIN CONFIGURATION MARKING INFORMATION T: S = SOP P: Z =Lead Free Null=regular package XXXXXXXX: Wafer Lot Y: Year; WW: Week V: Assembly Location GND FB NC HV GATE VDD SENSE RI SG6741TP XXXXXXXXYWWV ORDERING INFORMATION Part Number SG6741SZ Pb-Free Package SOP-8 PIN DESCRIPTIONS Pin No. Symbol 1 2 3 4 GND FB NC HV Function Ground Feedback NA Start-up Input Description Ground. The signal from the external compensation circuit is fed into this pin. The PWM duty cycle is determined in response to the signal on this pin and the current-sense signal on the SENSE pin. NC pin. For start-up, this pin is pulled high to the line input or bulk capacitor via resistors. A resistor connected from the RI pin to GND pin provides the SG6741 with a constant current source. This determines the center PWM frequency. Increasing the resistance reduces PWM frequency. Using a 26K resistor (RI) results in a 65kHz center PWM frequency. Current sense. The sensed voltage is used for peak-current-mode control and cycle-by-cycle current limiting. Power supply. The internal protection circuit disables PWM output as long as VDD exceeds the OVP trigger point. The totem-pole output driver. Soft driving waveform is implemented for improved EMI. 5 RI Reference Setting 6 7 8 SENSE VDD GATE Current Sense Power Supply Driver Output (c) System General Corp. Version 1.2.1 (IAO33.0047.B2) -2- www.sg.com.tw * www.fairchildsemi.com September 19, 2007 Product Specification Highly-Integrated Green-Mode PWM Controller SG6741 BLOCK DIAGRAM (c) System General Corp. Version 1.2.1 (IAO33.0047.B2) -3- www.sg.com.tw * www.fairchildsemi.com September 19, 2007 Product Specification Highly-Integrated Green-Mode PWM Controller SG6741 ABSOLUTE MAXIMUM RATINGS Symbol VDD VHV VL PD RJA TJ TSTG TL ESD Parameter Supply Voltage Input Voltage to HV Pin Input Voltage to FB, SENSE, Pin Power Dissipation, TA < 50C Thermal Resistance, Junction-to-Air Operating Junction Temperature Storage Temperature Range Lead Temperature (Wave soldering or IR, 10 seconds) Electrostatic Discharge Capability, Machine Model (All pins except HV pin) Value 30 500 -0.3 to 7 DIP SOP DIP SOP -40 to +125 -55 to +150 260 250 800 400 82.5 141 Unit V V V mW mW C/W C/W C C C KV V Electrostatic Discharge Capability, Human Body Model (All pins except HV pin) 3 *All voltage values, except differential voltages, are given with respect to the GND pin. *Stresses above those listed may cause permanent damage to the device. RECOMMENDED OPERATING CONDITIONS Symbol TA Parameter Operating Ambient Temperature Value -20 to +85 Unit C *For proper operation ELECTRICAL CHARACTERISTICS 12V VDD 25V; -20C TA 85C, unless otherwise noted. VDD Section Symbol VDD-OP VDD-ON VDD-OFF IDD-ST IDD-OP IDD-OLP VDD-OLP VDD-OVP tD-VDDOVP Parameter Continuously Operating Voltage Start Threshold Voltage Minimum Operating Voltage Start-up Current Operating Supply Current Internal Sink Current IDD-OLP Off Voltage VDD Over-Voltage Protection Test Condition Min. 15.5 9.5 Typ. 16.5 10.5 Max. 22 17.5 11.5 30 Unit V V V A mA A V V s VDD-ON - 0.16V VDD = 15V, GATE open VDD-OLP +0.1V (Auto Restart) 50 6.5 25 100 4 70 7.5 26 180 5 90 8.0 27 260 VDD Over-Voltage-protection Debounce Time (Auto Restart) HV Section Symbol IHV IHV-LC Parameter Supply Current Drawn from Pin HV Leakage Current After Start-up Test Condition VAC=90V(VDC=120V) VDD=0V With Auxiliary Supply HV = 500V, VDD = 15V Min. Typ. 2 1 Max. Unit mA 20 A (c) System General Corp. Version 1.2.1 (IAO33.0047.B2) -4- www.sg.com.tw * www.fairchildsemi.com September 19, 2007 Product Specification Highly-Integrated Green-Mode PWM Controller SG6741 Oscillator Section Symbol FOSC tHOP FOSC-G FDV FDT Parameter Frequency in Nominal Mode Hopping Period Green-Mode Frequency Frequency Variation vs. VDD Deviation Frequency Variation vs. Temp. Deviation Test Condition Center Frequency Hopping Range Min. 62 3.7 18 Typ. 65 4.2 4.4 22 Max. 68 4.7 25 5 5 Unit kHz ms kHz % % VDD=11V to 22V TA=-20 to 85 Feedback Input Section Symbol AV ZFB VFB-OPEN VFB-OLP tD-OLP VFB-N VFB-G Parameter Input Voltage to Current-Sense Attenuation Input Impedance FB Output High Voltage FB Open-Loop Trigger Level Delay Time, FB Pin Open-Loop Protection Green-Mode Entry FB Voltage Green-Mode Ending FB Voltage Test Condition Min. 1/3.75 4 Typ. 1/3.20 Max. 1/2.75 7 Unit V/V k V V ms V V FB Pin Open RI=26k 5.5 3.7 50 1.9 4.0 56 2.1 VFB-N -0.5 4.3 62 2.3 PWM Frequency FOSC FOSC-G VFB-G VFB-N VFB Current-Sense Section Symbol ZSENSE VSTHFL VSTHVA tPD tLEB VS-SCP tD-SSCP Parameter Input Impedance Current Limit Flatten Threshold Voltage Current Limit Valley Threshold Voltage Delay to Output Leading-Edge Blanking Time Threshold Voltage for SENSE Short-Circuit Protection Delay Time for SENSE Short-Circuit Protection Test Condition Min. 0.87 Typ. 12 0.90 0.22 100 350 0.15 Max. 0.93 0.26 200 425 Unit K V V ns ns V s VSTHFL-VSTHVA 0.18 275 VSENSE<0.15V, RI=26k 180 (c) System General Corp. Version 1.2.1 (IAO33.0047.B2) -5- www.sg.com.tw * www.fairchildsemi.com September 19, 2007 Product Specification Highly-Integrated Green-Mode PWM Controller SG6741 Gate Section Symbol DCYMAX VGATE-L VGATE-H tr tf IGATE-SOURCE VGATE-CLAMP Parameter Maximum Duty Cycle Gate Low Voltage Gate High Voltage Gate Rising Time Gate Falling Time Gate Source Current Gate Output Clamping Voltage Test Condition VDD=15V, IO=50mA VDD=12.5V, IO=50mA VDD=15V, CL=1nF VDD=15V, CL=1nF VDD=15V, GATE=6V VDD=22V Min. 60 8 150 30 250 Typ. 65 Max. 70 1.5 Unit % V V ns ns mA V 250 50 350 90 18 (c) System General Corp. Version 1.2.1 (IAO33.0047.B2) -6- www.sg.com.tw * www.fairchildsemi.com September 19, 2007 Product Specification Highly-Integrated Green-Mode PWM Controller SG6741 TYPICAL CHARACTERISTIC Start-up Current (IDD-ST) vs Temperature 25 5.0 Operating Supply Current (IDD-OP) vs Temperature 20 4.0 15 IDD-OP (mA) -40 -25 -10 5 20 35 50 65 80 95 110 125 IDD-ST (uA) 3.0 10 2.0 5 1.0 0 0.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature () Temperature () Start Threshold Voltage (VDD-ON) vs Temperature 20.0 13.0 Minimum Operating Voltage (VDD-OFF) vs Temperature 19.0 12.0 VDD-OFF (V) VDD-ON (V) 18.0 17.0 11.0 10.0 16.0 9.0 15.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 8.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature () Temperature () Supply current drawn from pin HV (IHV) vs Temperature 5.0 10 HV pin Leakage Current after Start-up (IHV-LC) vs Temperature 4.0 8 IHV (mA) 2.0 IHV-LC (uA) 3.0 6 4 1.0 2 0.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature () Tem perature () (c) System General Corp. Version 1.2.1 (IAO33.0047.B2) -7- www.sg.com.tw * www.fairchildsemi.com September 19, 2007 Product Specification Highly-Integrated Green-Mode PWM Controller SG6741 Frequency in nominal mode (FOSC) vs Temperature 70 70.0 Maximum Duty Cycle (DCYMAX) vs Temperature 68 68.0 66 DCY (%) MAX FOSC (kHz) 66.0 64 64.0 62 62.0 60 -40 -25 -10 5 20 35 50 65 80 95 110 125 60.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature () Temperature () . (c) System General Corp. Version 1.2.1 (IAO33.0047.B2) -8- www.sg.com.tw * www.fairchildsemi.com September 19, 2007 Product specification Highly-Integrated Green-Mode PWM Controller SG6741 Operation Description Start-up Current For start-up, the HV pin is connected to the line input or bulk capacitor through an external resistor, RHV, which is recommended as 100K. Typical start-up current drawn from pin HV is 2mA and it charges the hold-up capacitor through the resistor RHV. When the VDD capacitor level reaches VDD-ON, the start-up current switches off. At that moment, the VDD capacitor only supplies the SG6741 to maintain the VDD before the auxiliary winding of the main transformer to carry on provide the operating current. Current Sensing / PWM Current Limiting Peak-current-mode control is utilized in SG6741 to regulate output voltage and provide pulse-by-pulse current limiting. The switch current is detected by a sense resistor into the SENSE pin. The PWM duty cycle is determined by this current-sense signal and VFB, the feedback voltage. When the voltage on the SENSE pin reaches around VCOMP = (VFB-1.2)/3.2, the switch cycle is terminated immediately. VCOMP is internally clamped to a variable voltage around 0.85V for output power limit. Leading-Edge Blanking Each time the power MOSFET is switched on, a turn-on spike occurs on the sense-resistor. To avoid premature termination of the switching pulse, a leading-edge blanking time is built in. During this blanking period, the current-limit comparator is disabled and cannot switch off the gate driver. Operating Current Operating current is around 4mA. The low operating current enables better efficiency and reduces the requirement of VDD hold-up capacitance. Green-Mode Operation The patented green-mode function provides an off-time modulation to reduce switching frequency in light-load and no-load conditions. The on time is limited for better abnormal or brownout protection. VFB, which is derived from the voltage feedback loop, is used as the reference. Once VFB is lower than the threshold voltage, switching frequency is continuously decreased to the minimum green-mode frequency, around 22KHz (RI=26K). Under-Voltage Lockout (UVLO) The turn-on and turn-off thresholds are fixed internally at 16.5V/10.5V. During start-up, the hold-up capacitor must be charged to 16.5V through the start-up resistor so that IC is enabled. The hold-up capacitor continues to supply VDD before the energy can be delivered from auxiliary winding of the main transformer. VDD must not drop below 10.5V during this start-up process. This UVLO hysteresis window ensures that hold-up capacitor is adequate to supply VDD during start-up. Oscillator Operation A resistor connected from the RI pin to GND generates a constant current source for the SG6741 controller. This current is used to determine the center PWM frequency. Increasing the resistance reduces PWM frequency. Using a 26K resistor, RI, results in a corresponding 65KHz PWM frequency. The relationship between RI and the switching frequency is: = 1690 RI (K ) (KHz) --------------------- Gate Output / Soft Driving The SG6741 BiCMOS output stage is a fast totem pole gate driver. Cross conduction has been avoided to minimize heat dissipation, increase efficiency, and enhance reliability. The output driver is clamped by an internal 18V Zener diode to protect power MOSFET transistors against undesirable gate over-voltage. A soft driving waveform is implemented to minimize EMI. fPWM (1) The range of the PWM oscillation frequency is designed as 47kHz ~ 109kHz. (c) System General Corp. Version 1.2.1 (IAO33.0047.B2) -9- www.sg.com.tw * www.fairchildsemi.com September 19, 2007 Product specification Highly-Integrated Green-Mode PWM Controller SG6741 Built-in Slope Compensation The sensed voltage across the current-sense resistor is used for peak-current-mode control and pulse-by-pulse current limiting. Built-in slope compensation improves stability and prevents sub-harmonic oscillation. SG6741 inserts a synchronized positive-going ramp at every switching cycle. Limited Power Control The FB voltage increases every time the output of the power supply is shorted or overloaded. If the FB voltage remains higher than a built-in threshold for longer than tD-OLP, PWM output is turned off. As PWM output is turned off, the supply voltage VDD begins decreasing. When VDD goes below the turn-off threshold (eg, 10.5V) the controller totally shuts down. VDD is charged up to the turn-on threshold voltage of 16V through the start-up resistor until PWM output is restarted. This protection is activated as long as the overloading condition persists. This prevents the power supply from overheating. Constant Output Power Limit When the SENSE voltage, across the sense resistor RS, reaches the threshold voltage around 0.9V, the output GATE drive is turned off after a small delay, tPD. This delay introduces an additional current, proportional to tPD * VIN / LP. The delay is nearly constant, regardless of the input voltage VIN. Higher input voltage results in a larger additional current and the output power limit is also higher than that under low input line voltage. To compensate this variation for wide AC input range, a sawtooth power-limiter is designed to solve the unequal power-limit problem. The power limiter is designed as a positive ramp signal and is fed to the inverting input of the OCP comparator. This results in a lower current limit at high-line inputs than at low-line inputs. Noise Immunity Noise on the current sense or control signal may cause significant pulse width jitter, particularly in the continuous-conduction mode. Slope compensation helps alleviate this problem. Good placement and layout practices should be followed. Avoiding long PCB traces and component leads, locating compensation and filter components near to the SG6741, and increasing the power MO gate resistance improves performance. VDD Over-Voltage Protection VDD over-voltage protection has been built in to prevent damage due to abnormal conditions. Once the VDD voltage is over the VDD over-voltage protection voltage (VDD-OVP), and lasts for tD-VDDOVP, the PWM pulses is disabled until the VDD voltage drops below the UVLO, then starts up again. Over-voltage conditions are usually caused by open feedback loops. (c) System General Corp. Version 1.2.1 (IAO33.0047.B2) - 10 - www.sg.com.tw * www.fairchildsemi.com September 19, 2007 Product specification Highly-Integrated Green-Mode PWM Controller SG6741 REFERENCE CIRCUIT CIRCUIT (12V/5A) 2 BD1 CN1 1 2 3 1 3 CN1 L1 T1 2 4 2 4 VZ1 C2 1 3 4 1 2 4 5 6 2 1 T2 8 3 + 3 C3 C5 R1 Q1 2 1 + L4 2 2 + VO+ 2 L2 4 1 VO+ 1 2 C1 R2 C6 C4 1 C7 1 C8 1 3 D1 D2 2 3 7 1 VO2 R3 2 R4 1 3 1 2 U1 1 2 C12 3 4 GND FB NC HV SG6741 GATE VDD SENSE RI 8 7 6 5 R6 C10 1 + C9 D3 2 R5 R7 U2 R8 4 1 Q2 VO+ R9 3 K2 C11 R R10 U3 A R11 BOM Reference BD1 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 D1 D2 D3 F1 L1 Q1 Component BD 4A/600V XC 0.68F/300V XC 0.1F/300V YC 222pF/Y1 EC 120F/400V CC 0.01F/500V CC 102pF/100V EC 1000F/25V EC 470F/25V EC 22F/50V CC 470pF/50V CC 222pF/50V CC 103pF/50V Zener Diode 15V 1/2W (option) BYV95C FR103 FUSE 4A/250V 900H STP20-100CT Reference Q2 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 T1 T2 U1 U2 U3 VZ1 Component MOS 7A/600V R 100Kohm 1/2W R 47ohm 1/4W R 100Kohm 1/2W R 20ohm 1/8W R 100ohm 1/8W R 33Kohm 1/8W R 0.3ohm 2W R 680ohm 1/8W R 4.7Kohm 1/8W R 150Kohm 1/8W R 39Kohm 1/8W 10mH 600H(PQ2620) IC SG6741 IC PC817 IC TL431 VZ 9G (c) System General Corp. Version 1.2.1 (IAO33.0047.B2) - 11 - www.sg.com.tw * www.fairchildsemi.com September 19, 2007 Product specification Highly-Integrated Green-Mode PWM Controller SG6741 PACKAGE INFORMATION 8PINS-SOP(S) C 8 5 1 b 4 e D A1 A Dimensions Symbol A A1 b c D E e F H L Millimeter Min. Typ. 1.346 0.101 0.406 0.203 4.648 3.810 1.016 5.791 0.406 0 1.270 0.381X45 (c) System General Corp. Version 1.2.1 (IAO33.0047.B2) H F E L Max. 1.752 0.254 Inch Min. 0.053 0.004 Typ. 0.016 0.008 Max. 0.069 0.010 4.978 3.987 1.524 6.197 1.270 8 0.183 0.150 0.040 0.228 0.016 0 0.050 0.015X45 0.196 0.157 0.060 0.244 0.050 8 - 12 - www.sg.com.tw * www.fairchildsemi.com September 19, 2007 Product specification Highly-Integrated Green-Mode PWM Controller SG6741 (c) System General Corp. Version 1.2.1 (IAO33.0047.B2) - 13 - www.sg.com.tw * www.fairchildsemi.com September 19, 2007 |
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